Device Firmware

Introduction

The PIC microcontroller is responsible for coordinating the operation of the analog circuitry, and must also transfer sampled information. It must communicate with several ICs in the MCA. It reads peak height values from the ADC, it reads the number of pulses from the counter, and it sets the gain on the incoming signal through a DAC. These data transfers occur using SPI. The PIC must also communicate with the computer.

Control Flow

Firmware Flow Diagram

The operation of the microcontroller firmware is illustrated in the flowchart above. After initializing the system and connecting to the hardware components on the board, the PIC enters a continuous loop. In order to implement the counting, event detection, and sampling operations, it performs the steps shown in the diagram. More in-depth descriptions are below.

Update Time
Data sent back to the host computer can be tagged with timing information. This is useful for determining pulse spacing and for normalizing flux measurements. To keep track of time, the PIC updates a time count with a routine that increments a counter every 1 millisecond.
Counter On?
The user can select whether the fast count channel is on or off. If it is on (flux information is desired), the firmware places pulse count information into a transfer buffer.
Discrimination?
If information about individual pulse heights or times is desired, the user can enable the "slow" channel. This channel uses the external (off-PIC) analog-to-digital converter to convert a latched pulse height to a datapoint that is placed in the transfer buffer.
USB Connection
The PIC must do nontrivial work to ensure that the connection with the host computer is maintained and that requests from the host computer are handled appropriately. These requests include configuration requests (like setting the threshold for discriminating pulses from noise) and requests to reset microcontroller systems.
USB free?
The microcontroller uses a bulk endpoint to send data back to the computer. Unlike isochronous endpoints, bulk endpoints do not guarantee realtime access. Therefore, the aforementioned transfer buffer stores unsent events, which are sent when the bus is available.